Delta modulation (DM) is a known codec technique for digitally encoding/decoding analog voice signals. It exploits the sample-to-sample redundancy of the speech waveform. Successive single bit samples are made of the difference signal magnitude between the actual voice signal and an approximation of the voice waveform produced by integrating associated quantized sample step voltage signals. The binary state of the samples indicate whether the difference signal has increased or decreased and are used to control the polarity of the quantized step signals to allow the approximation to track the actual voice signal. The sample bit code may then be decoded to reconstruct the voice waveform by using the sample bits to control the step polarity of a second, identical integrating circuit.
In adaptive delta modulation (ADM) codecs the amplitude as well as the polarity of the integrated step voltage is varied algorithmically as a function of the difference signal magnitude. The purpose is to make the height (H(t) of the step voltage V(t) large when the difference signal magnitude is large voice signal slope is steep) and small when the (slope is small). This allows the approximation to track the input over a wide range of input levels, providing a higher signal-to-noise (S/N) ratio by minimizing distortion due to slope overload noise (approximation falls more than a step size behind the voice signal) and quantization noise (proportional to square of the step size). Since voice signal slope varies with syllable generation this ADM technique is also known as syllable companding.
One type of syllabic companding used in telephony applications for handling a wide dynamic range of speech signals is continuously variable slope delta modulation (CVSD). In CVSD systems the step voltage amplitude is varied as a function of the short term average of the slope amplitude information, which is derived from the sample bit stream. Successive equal state bit samples, i.e. "coincidence" indicate rapid slope change, typically successive logic ones indicate rapid positive slope and logic zeros indicate a rapid negative slope. The bit samples are integrated in an UP/DOWN counter to provide a present sample interval bit state count, i.e. a binary signal count S(t). The step height in each sample interval is the product of the particular interval binary signal count and the selected algorithm (V.sub.o) of a syllabic filter.
In prior art CVSD codecs the step height is either increased directly with the binary signal count S(t) as V(t)=V.sub.o *S(t) or as the product of the count and a first order lag, e.g. V(t)=V.sub.o *S(t) 1-e.sup.-t/RC. Typically the prior art codec encoder and decoder circuitry is built around proprietary integrated circuit CVSD encoders, such as the Harris HC-5516/55532 or Motorola MC 3417/3418 CVSD. The binary signal S(t) sets different fixed step sizes based on the presence or absence of binary state coincidence. For steep voice signal slopes V.sub.o *S(t)=V.sub.H, otherwise V.sub.o *S(t)=V.sub.L which is less than V.sub.H but the same polarity. The set step is then integrated through an RC filter, e.g. V(t)=V.sub.H (1-e.sup.-t/RC).
The RC time constant is empirically set in dependence on syllabic duration, and controls the rate of change in value of the step as ##EQU1## for a slow changing voice signal slope the change in step size is rapid whereas for rapid slopes the step rate of change is insignificant. In effect the rate of step change is inversely proportional to the step amplitude setting. This produces undesirable S/N ratios over the range of input signal magnitudes, such as during idle, due to quantization and slope overload noise. Ideally the rate of change in step amplitude should follow the rate of change in voice signal slope.